74HC595 8 bit Shift Register Module for Arduino - Revision history

Admin: /* How to buy */

2014-05-16T10:29:10Z

How to buy

← Older revision		Revision as of 10:29, 16 May 2014
Line 40:		Line 40:

	= How to buy =		= How to buy =
	~~Please click~~ here to buy [http://www.geeetech.com/m74hc595b1r-74hc595-8-bit-shift-register-module-for-arduino-p-439.html 74HC595 8 bit Shift Register Module for Arduino]		Click here to buy [http://www.geeetech.com/m74hc595b1r-74hc595-8-bit-shift-register-module-for-arduino-p-439.html 74HC595 8 bit Shift Register Module for Arduino]

Admin at 10:26, 16 March 2012

2012-03-16T10:26:18Z

← Older revision		Revision as of 10:26, 16 March 2012
Line 38:		Line 38:
	== Pinning information ==		== Pinning information ==
	[[File:74hc595pin.jpg\|350px]][[File:74595pindef.jpg\|400px]]		[[File:74hc595pin.jpg\|350px]][[File:74595pindef.jpg\|400px]]

			= How to buy =
			Please click here to buy [http://www.geeetech.com/m74hc595b1r-74hc595-8-bit-shift-register-module-for-arduino-p-439.html 74HC595 8 bit Shift Register Module for Arduino]

Admin: /* Pinning information */

2012-03-16T10:24:23Z

Pinning information

← Older revision		Revision as of 10:24, 16 March 2012
Line 37:		Line 37:

	== Pinning information ==		== Pinning information ==
	[[File:74hc595pin.jpg\|350px]][[File:74595pindef.jpg\|~~350px~~]]		[[File:74hc595pin.jpg\|350px]][[File:74595pindef.jpg\|400px]]

Admin at 10:24, 16 March 2012

2012-03-16T10:24:02Z

← Older revision		Revision as of 10:24, 16 March 2012
Line 33:		Line 33:

	== Functional diagram ==		== Functional diagram ==
	[[File:Functional diagram.jpg\|~~300px~~]]		[[File:Functional diagram.jpg\|400px]]


			== Pinning information ==
			[[File:74hc595pin.jpg\|350px]][[File:74595pindef.jpg\|350px]]

Admin at 10:22, 16 March 2012

2012-03-16T10:22:39Z

← Older revision		Revision as of 10:22, 16 March 2012
Line 2:		Line 2:
	== General description ==		== General description ==
	[[File:74hc595.jpg\|300px]]		[[File:74hc595.jpg\|300px]]
	[[File:74595socket.jpg]]		[[File:74595socket.jpg\|200px]]

	This is a breakout board for 74HC595 8 bit Shift Register.The 74HCT595 are high-speed Si-gate CMOS devices and are pin		This is a breakout board for 74HC595 8 bit Shift Register.The 74HCT595 are high-speed Si-gate CMOS devices and are pin
Line 33:		Line 33:

	== Functional diagram ==		== Functional diagram ==
			[[File:Functional diagram.jpg\|300px]]

Admin at 10:21, 16 March 2012

2012-03-16T10:21:38Z

← Older revision		Revision as of 10:21, 16 March 2012
Line 1:		Line 1:

	== General description ==		== General description ==
	[[File:74hc595.jpg\|300px~~\|left~~]]		[[File:74hc595.jpg\|300px]]
			[[File:74595socket.jpg]]

	This is a breakout board for 74HC595 8 bit Shift Register.The 74HCT595 are high-speed Si-gate CMOS devices and are pin		This is a breakout board for 74HC595 8 bit Shift Register.The 74HCT595 are high-speed Si-gate CMOS devices and are pin
	compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A.The 74HC595;		compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A.The 74HC595;

Admin at 10:20, 16 March 2012

2012-03-16T10:20:57Z

← Older revision		Revision as of 10:20, 16 March 2012
Line 1:		Line 1:

	== General description ==		== General description ==
	[[File:74hc595.jpg\|~~400px~~]]		[[File:74hc595.jpg\|300px\|left]]
	This is a breakout board for 74HC595 8 bit Shift Register.The 74HCT595 are high-speed Si-gate CMOS devices and are pin		This is a breakout board for 74HC595 8 bit Shift Register.The 74HCT595 are high-speed Si-gate CMOS devices and are pin
	compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A.The 74HC595;		compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A.The 74HC595;

Admin at 10:20, 16 March 2012

2012-03-16T10:20:30Z

← Older revision		Revision as of 10:20, 16 March 2012
Line 1:		Line 1:

	== General description ==		== General description ==
			[[File:74hc595.jpg\|400px]]
	This is a breakout board for 74HC595 8 bit Shift Register.The 74HCT595 are high-speed Si-gate CMOS devices and are pin		This is a breakout board for 74HC595 8 bit Shift Register.The 74HCT595 are high-speed Si-gate CMOS devices and are pin
	compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A.The 74HC595;		compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A.The 74HC595;
Line 28:		Line 28:
	Serial-to-parallel data conversion<br>		Serial-to-parallel data conversion<br>
	Remote control holding register<br>		Remote control holding register<br>


			== Functional diagram ==

Admin: Created page with " == General description == This is a breakout board for 74HC595 8 bit Shift Register.The 74HCT595 are high-speed Si-gate CMOS devices and are pin compatible with Low-power S..."

2012-03-16T10:12:22Z

Created page with " == General description == This is a breakout board for 74HC595 8 bit Shift Register.The 74HCT595 are high-speed Si-gate CMOS devices and are pin compatible with Low-power S..."

New page

== General description ==

This is a breakout board for 74HC595 8 bit Shift Register.The 74HCT595 are high-speed Si-gate CMOS devices and are pin
compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A.The 74HC595;
74HCT595 are 8-stage serial shift registers with a storage register and 3-state outputs. The registers have separate
clocks.Data is shifted on the positive-going transitions of the shift register clock input (SHCP). The data in each
register is transferred to the storage register on a positive-going transition of the storage register clock input (STCP).
If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register.The
shift register has a serial input (DS) and a serial standard output (Q7S) for cascading. It is also provided with
asynchronous reset (active LOW) for all 8 shift register stages. The storage register has 8 parallel 3-state bus driver
outputs. Data in the storage register appears at the output whenever the output enable input (OE) is LOW.

== Features and benefits ==
8-bit serial input 
8-bit serial or parallel output 
Storage register with 3-state outputs 
Shift register with direct clear 
100 MHz (typical) shift out frequency 
ESD protection: 
HBM JESD22-A114F exceeds 2 000 V 
MM JESD22-A115-A exceeds 200 V 
Multiple package options 

== Applications ==
Serial-to-parallel data conversion 
Remote control holding register